1. Field of the Invention
The present invention relates to a phase-locked loop (PLL) circuit including a voltage-controlled oscillator (VCO) having a variable gain and, more particularly, to a PLL circuit in which a VCO has different gains according to a mode transition to ensure a wide operating frequency and improve a phase noise characteristic.
2. Discussion of Related Art
In general, a phase-locked loop (PLL) circuit is a frequency feedback circuit configured to generate a signal having an arbitrary frequency in response to the frequency of an externally applied signal. The PLL circuit may detect a phase difference between a reference signal and an oscillation signal and synchronize phases in response to an up-down signal corresponding to the detected phase difference such that the oscillation signal has a desired frequency. The PLL circuit may be widely used for semiconductor integrated circuits (ICs), such as memory devices, frequency synthesis circuits, or clock recovery circuits of data processing circuits.
A typical PLL circuit may include a phase frequency detector (PFD), a charge pump, a loop filter, and a voltage-controlled oscillator (VCO). The PFD may detect a phase difference between a reference signal and an oscillation signal fed back from the VCO. The charge pump may output charges corresponding to an output signal of the PFD. The loop filter may filter a high-frequency component of an output signal of the charge pump and apply a control voltage to the VCO. The VCO may generate an oscillation signal having a frequency corresponding to the control voltage of the loop filter.
There are many considerations in designing the PLL circuit. A power supply voltage of the PLL circuit may be the most important consideration caused by the development of complementary metal-oxide semiconductor (CMOS) technology. That is, as the power supply voltage of the PLL circuit decreases, a tuning range of the PLL circuit may be further limited. Typical methods used in efforts to solve the above-described problem include a method of increasing the number of capacitor banks included in a VCO and controlled by a digital code, a method of employing two different inductors, and a method of expanding a variable range of a resonance frequency by allowing a VCO to have a large gain.
However, when the number of the capacitor banks is increased, the entire designed area may be increased, and a VCO may exhibit a nonlinear characteristic according to the number of capacitor banks. Also, when a large number of capacitor banks are provided, a parasitic capacitor and a leakage current may be caused to the output of the VCO, thereby reducing a Q-value. Meanwhile, when the number of inductors is increased, the designed area may be limited, and the use of the VCO with a large gain may worsen noise characteristics of the PLL circuit. A gain of the VCO may be expressed by a variation in the output frequency of the VCO relative to a variation in the control voltage of the PLL circuit. Thus, as the variation in the frequency of the VCO increases in response to a fixed control voltage, the entire VCO may increase. That is, when the VCO has a great gain, the frequency of the VCO may be greatly varied due to noises of the control voltage of the PLL circuit, thereby adversely affecting the noise characteristics of the PLL circuit.